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CCL offers an ASIC
design service which aims to optimise the overall product, not just its
ASIC components. We therefore place much emphasis on system partitioning
to minimise overall cost, power, risk etc. as appropriate for a specific
application. We are then able to implement the resultant ASIC specification
on any technology (CMOS, bipolar, GaAs, MMIC), targeting a vendor process
chosen (with the client) as best matched to the technical and commercial
objectives of the project. Particular areas of expertise include:
- Mixed-mode design
(we routinely integrate analog signal processing A to D conversion,
DSP and data processing on a single chip)
- Design for minimum
power consumption
- We have proven
nano-power ADC architectures
- We have proprietary
approaches for minimisation in DSP
- We have our
own 16 bit processor core optimised for power
- Design for product
testibility

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Prime:
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Design |
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Subsidiary:
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Consulting |
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Employees:
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10-50 |


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PLD |

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FPGA |

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Masked ASIC |

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Microcontroller
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Other |

| PC
Based: |
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Other: |
On
SUN workstations |
| Details: |
- Proprietary
tools for system simulation and mixed-mode ASIC verification
- HSPICE and
HILO for circuit and gate level simulation
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