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To complement the supply of leading edge FPGA and CPLD devices, Xilinx offers state-of-the-art development system software, designed to work with most existing CAE vendors' tools. Software is offered in a number of forms, including complete "shrink-wrapped" design solutions with the Foundation Series software and CAE vendor specific solutions with the Alliance Series software. Additionally, Xilinx AllianceCore partners offer a wide variety of cores together with expert design services. These are supported by comprehensive libraries of core solutions available from Xilinx, which cover a wide range of commonly used functions. The core solutions range from LogiCores (pre-implemented and verified system level logic solutions) to reference designs (free example designs). These comprehensive software design solutions are backed up by world class technical support available to customers either through the network of Xilinx distributors or even direct from Xilinx locations around Europe.
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PLD
|
FPGA
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MPGA
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CBIC
|
ANALOG
|
MIXED
SIG.
|
FULL
CUST.
|
|---|---|---|---|---|---|---|---|
| PC-BASED CAD (EDA) TOOLS |
-
|
-
|
-
|
-
|
-
|
-
|
-
|
| Design Styles Supported |
Y
|
Y
|
-
|
-
|
-
|
-
|
-
|
| Entry Level Costs |
£0
|
£50
|
-
|
-
|
-
|
-
|
-
|
| Annual Maintenance Charges |
-
|
-
|
-
|
-
|
-
|
-
|
-
|
| Workable Minimum Configuration |
Pentium
PC, 64MB RAM, 1GB hard disk, Win 98 or NT, SVGA
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| WORKSTATION CAD (EDA) TOOLS |
-
|
-
|
-
|
-
|
-
|
-
|
-
|
| Design Styles Supported |
Y
|
Y
|
-
|
-
|
-
|
-
|
-
|
| Entry Level Costs |
£50
|
£350
|
-
|
-
|
-
|
-
|
-
|
| Annual Maintenance Charges |
-
|
-
|
-
|
-
|
-
|
-
|
-
|
| Workable Minimum Configuration |
50-500MB
hard disk, 64MB RAM, 140MB swap space, TCP/IP software, CD-ROM
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PLD =
Programmable Device, FPGA = Field Programmable Gate Array
MPGA = Mask Programmable Gate Array, CBIC
= Cell Based Integrated Circuit