Electronics Design CD Introduction

Saros Technology Ltd supply a range of tools to implement the complete VHDL design flow for FPGA and ASIC on PC or Unix platforms. From graphical design entry through simulation to synthesis as well as training, libraries and test tools, Saros is highly focused on VHDL and brings best in class tools to the market.

Prime:
Distribution

Subsidiary:
Tool Origination

Employees:
10-50

High Level Capture / Simulation
Low Level (Schematic) Capture / Simulation
Synthesis

Test
Physical Design
Design Verification

High Level Design Capture / Simulation
PCB Design
Thermal Design / Simulation

EMC
Other

Mentor

All VHDL compliant libraries.

IBM PC or Compatible, Workstation - Unix, Sun, HP, IBM RS6000

www.saros.co.uk

chris@saros.co.uk

Address:

Spirella Building,
Bridge Road,
Letchworth Garden City,
Hertfordshire.
SG6 4ET

tel:

01462 476111

fax:
01462 476112

Sales:
Chris Rose

	PLD	FPGA	MPGA	CBIC	ANALOG	MIXED SIG.	FULL CUST.
PC-BASED CAD (EDA) TOOLS	-	-	-	-	-	-	-
Design Styles Supported	VHDL & Schematic				-	N/A	N/A
Entry Level Costs	£900	£900	£4000	£4000	-	N/A	N/A
Annual Maintenance Charges	£200	£200	£800	£800	-	-	-
Workable Minimum Configuration	Pentium 100, 16Mb RAM, 50Mb free disk space, CD ROM, Windows 95 / NT
WORKSTATION CAD (EDA) TOOLS	-	-	-	-	-	-	-
Design Styles Supported	VHDL & Schematic				N/A	N/A	N/A
Entry Level Costs	£10000	£10000	£10000	£10000	-	-	-
Annual Maintenance Charges	£1500	£1500	£1500	£1500	-	-	-
Workable Minimum Configuration	Unix 32Mb RAM, 1000Mb free disk

PLD = Programmable Device, FPGA = Field Programmable Gate Array
MPGA = Mask Programmable Gate Array, CBIC = Cell Based Integrated Circuit