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Mentor Graphics' solutions accelerate the process of creating, debugging and verifying VHDL and Verilog based designs from a technology-independent system level down to a technology-specific implementation. It also allows true architectural exploration at the system level of the design. Solutions span PLD, FPGA, ASIC and IC design; design for test; analog and mixed-signal; board (including high-speed) and MCM design.Mentor Graphics' approach of combining best-in-class point tools into well integrated, complete, design flows provides extremely powerful design environments for designers facing the challenges of complex functionality, implemented on large capacity silicon.
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Technical Contact: Steve Collis Tel: 01635 811411 Fax: 01635 810108 |
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PLD
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FPGA
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MPGA
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CBIC
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ANALOG
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MIXED
SIG.
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FULL
CUST.
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|---|---|---|---|---|---|---|---|
| PC-BASED CAD (EDA) TOOLS |
Y
|
Y
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Y
|
Y
|
Y
|
Y
|
-
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| Design Styles Supported |
Y
|
Y
|
Y
|
Y
|
Y
|
Y
|
-
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| Entry Level Costs |
£7500
|
£7500
|
£7500
|
£7500
|
£15000
|
£15000
|
-
|
| Annual Maintenance Charges |
12%
|
12%
|
12%
|
12%
|
12%
|
12%
|
-
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| Workable Minimum Configuration |
Windows
95 / 98 or NT
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| WORKSTATION CAD (EDA) TOOLS |
Y
|
Y
|
Y
|
Y
|
Y
|
Y
|
Y
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| Design Styles Supported |
Y
|
Y
|
Y
|
Y
|
Y
|
Y
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Y
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| Entry Level Costs |
£7500
|
£7500
|
£7500
|
£7500
|
£15000
|
£15000
|
£18000
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| Annual Maintenance Charges |
12%
|
12%
|
12%
|
12%
|
12%
|
12%
|
12%
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| Workable Minimum Configuration |
Entry
Level Sun or HP workstation, 64Mb RAM
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PLD =
Programmable Device, FPGA = Field Programmable Gate Array
MPGA = Mask Programmable Gate Array, CBIC
= Cell Based Integrated Circuit