Creator of the Warp software to support our CPLDs. Multiple entry methods including VHDL and Verilog.

Manufacturer of SRAM, PROM, DATACOM PRODUCTS, CPLDs, PALs, CLOCKs and USB ICs.

Field Applications Engineers to advise on devices and help with designs. UK Design Centre writes VHDL code for CPLD designs and microcode for USB designs.

Technical Contact:
Chris Jones (cdj@cypress.com)


Prime:
  Sales
Subsidiary:
 
Employees:
  >10


High Level Capture / Simulation

Low Level (Schematic) Capture / Simulation

Synthesis

Test

Physical Design

Design Verification


Stand alone, Mentor, Cadence, Model Technology, Synopsys


IBM PC or Compatible, Workstation - Sun, HP


www.cypress.com


mkn@cypress.com

 


Address:
Gate House,
Fretherne Road,
Welwyn Garden City,
Hertfordshire.
AL8 6NS
tel:
01707 378700
fax:
01707 378737
Sales:
Mike Noble

 





PLD
FPGA
MPGA
CBIC
ANALOG
MIXED SIG.
FULL CUST.
PC-BASED CAD (EDA) TOOLS
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-
-
-
-
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-
Design Styles Supported
Y
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-
-
-
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-
Entry Level Costs
£65
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-
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Annual Maintenance Charges
FREE
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-
-
-
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Workable Minimum Configuration
Windows 95 / 98 / NT
WORKSTATION CAD (EDA) TOOLS
-
-
-
-
-
-
-
Design Styles Supported
Y
-
-
-
-
-
-
Entry Level Costs
£65
-
-
-
-
-
-
Annual Maintenance Charges
FREE
-
-
-
-
-
-
Workable Minimum Configuration
Solaris 2.5 or later, HP-UX 10.1 or later

PLD = Programmable Device, FPGA = Field Programmable Gate Array
MPGA = Mask Programmable Gate Array,
CBIC = Cell Based Integrated Circuit