Agilent Technologies EEsof's Advanced Design System is a new EDA solution developed specifically to simulate that entire communications signal path. This unique solution, available for both PC ad UNIX platforms, integrates Agilent EEsof's proven DSP simulator with RF and analog simulators into a single, flexible design environment. The result is a software solution that takes your DSP design from accurate behavioural-level system simulation, incorporating non-linear RF effects, all the way down to RTL or component-level circuit design, all within one user interface and one database.

The system level modelling, design and optimisation capabilities in Agilent Advanced Design System will help you conquer the DSP ASIC design challenge.


Prime:
  R & D / Prod / Distribution of Design Automation Software
Subsidiary:
 
Employees:
  >50


High Level Capture / Simulation

Low Level (Schematic) Capture / Simulation

Synthesis

Test

Physical Design

Design Verification


High Level Design Capture / Simulation

PCB Design

Thermal Design / Simulation

EMC

Test


Agilent Technologies Design System (ADS), Mentor, Cadence, Model technology, Synopsys


Xilinx, LSI, Altera


IBM PC or Compatible, Workstation - Sun, Agilent Technologies


www.tm.agilent.com/tmo/hpeesof


hpeesof_solutions@wlv.hp.com

 


Address:

Agilent Technologies Ltd,
Eskdale Road,
Winnersh Triangle,
Wokingham,
Berkshire,

RG41 5DZ

tel:
07004 666666
fax:
07004 444555
Sales:
Mike Bradford

 





PLD
FPGA
MPGA
CBIC
ANALOG
MIXED SIG.
FULL CUST.
PC-BASED CAD (EDA) TOOLS
-
-
-
-
-
-
-
Design Styles Supported
Y
Y
Y
Y
Y
Y
Y
Entry Level Costs
P.O.A
P.O.A
P.O.A
P.O.A
P.O.A
P.O.A
P.O.A
Annual Maintenance Charges
12%
12%
12%
12%
12%
12%
12%
Workable Minimum Configuration
Windows 95 / 98 / NT
WORKSTATION CAD (EDA) TOOLS
-
-
-
-
-
-
-
Design Styles Supported
Y
Y
Y
Y
Y
Y
Y
Entry Level Costs
P.O.A
P.O.A
P.O.A
P.O.A
P.O.A
P.O.A
P.O.A
Annual Maintenance Charges
12%
12%
12%
12%
12%
12%
12%
Workable Minimum Configuration
HPUX, Solaris, SunOS, AIX

PLD = Programmable Device, FPGA = Field Programmable Gate Array
MPGA = Mask Programmable Gate Array,
CBIC = Cell Based Integrated Circuit