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The Actel designer and design advantage systems are high-productivity, computer-aided engineering environments for the Actel family of field programmable gate arrays (FPGAs). These design tools are fully automatic and with version 3.0, provide fully deterministic timing. Features include : design mapping, device place and route, VHDL synthesis, macro generation, timing analysis and programming.
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Technical Contact: Joe Wells |
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| PC-BASED CAD (EDA) TOOLS |
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| Design Styles Supported |
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| Entry Level Costs |
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| Annual Maintenance Charges |
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$995
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| Workable Minimum Configuration |
IBM
PC compatible, 486DX with VGA 16Mb RAM, 150Mb disk
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| WORKSTATION CAD (EDA) TOOLS |
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| Design Styles Supported |
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| Entry Level Costs |
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FOC
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$995
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PLD =
Programmable Device, FPGA = Field Programmable Gate Array
MPGA = Mask Programmable Gate Array, CBIC
= Cell Based Integrated Circuit