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DERA provides a complete ASIC design and prototyping service - committing circuits onto industrial gate arrays using direct-write patterning. This offers cost-effective access to small quantities of silicon circuits for feasibility studies etc. via fast turn-around of prototypes and multiple design variations on-wafer. A route to higher volume chip manufacture is available through the gate array supplier. Low risk designs / prototypes can be implemented in mixed-signal CMOS gate arrays or the well established GPS "DA" and "DX" bipolar array series offering both high performance analogue and digital functions. Applications range from high voltage, good drive capability circuits to high speed mixed-signal circuits incorporating 4000 equivalent gates.
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Technical Contact: A G Brown, Tel 01684 894669 |
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Signal |
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| Scope of supply |
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Y
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Y
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Y
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| Available Gates (minimum/maximum) |
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4000
max equiv
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4000
max equiv
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| Minimum order volume |
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10
chips
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10
chips
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10
chips
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| Minimum order value |
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*on
appli
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*on
appli
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*on
appli
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| Entry level costs (Inc. NRE costs & essential specific CAD tools) |
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£0k-£30k
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from
£0
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to
£30k
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| Delivery (weeks) |
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2-6
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2-6
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2-6
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| Is design support provided? |
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Yes
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Yes
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Yes
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| Is vendor specific software/hardware required? |
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No
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No
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No
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| Is programming service for PLDJFPGA provided? |
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-
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-
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| Can design be carried out on industry standard PCs? |
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Yes
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Yes
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Yes
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PLD
= Programmable logic Device FPGA = Field Programmable Gate Array
MPGA = Mask Programmed Gate Array CBIC = Cell Based Integrated
Circuit